This video describes the anatomy of a machine code instruction and the way the bits of the central processing unit’s current instruction register are allocated to the operation code and the operands. The impact of this on the size of the processor’s instruction set is highlighted. The video then describes the need for different processor addressing modes, and includes illustrations of the most common addressing modes including immediate addressing, direct addressing, indirect addressing, register direct addressing, register indirect addressing, relative addressing and indexed addressing. Examples of these addressing modes are illustrated in terms of the way main memory is accessed during the fetch-decode-execute cycle, including the role of various registers including the memory address register, memory data register, program counter and index register.