×
Blog Create CV Courses Certificates Online Courses Communities

Login

Sign up
MindLuster Logo
Categories
Popular

Join Our Telegram Channel Now to Get Any New Free Courses : Click Here

VLSI Physical Design basics

Course Reviews

Track :

Engineering

Lessons no : 67

For Free Certificate After Complete The Course

To Register in Course you have to watch at least 30 Second of any lesson

Join The Course Go To Community

How to Get The Certificate

  • You must have an account Register
  • Watch All Lessons
  • Watch at least 50% of Lesson Duration
  • you can follow your course progress From Your Profile
  • You can Register With Any Course For Free
  • The Certificate is free !
Lessons | 67
PD Lec 1 Introduction to Physical Design | Tutorial | VLSI
00:03:44

PD Lec 1 Introduction to Physical Design | Tutorial | VLSI
PD Lec 2 CMOS Basics part 1 | Tutorial | VLSI | Physical Design
00:05:43

PD Lec 2 CMOS Basics part 1 | Tutorial | VLSI | Physical Design
PD Lec 3 CMOS Basics part 2 | Tutorial | VLSI | Physical Design
00:08:29

PD Lec 3 CMOS Basics part 2 | Tutorial | VLSI | Physical Design
PD Lec 4 CMOS Basics part 3 | Tutorial | VLSI | Physical Design
00:07:05

PD Lec 4 CMOS Basics part 3 | Tutorial | VLSI | Physical Design
PD Lec 5 Logic Gate Conversion | Tutorial | VLSI | Physical Design
00:07:01

PD Lec 5 Logic Gate Conversion | Tutorial | VLSI | Physical Design
PD Lec 6 CMOS basics part 4 | Tutorial | VLSI | Physical Design
00:07:54

PD Lec 6 CMOS basics part 4 | Tutorial | VLSI | Physical Design
PD Lec 7 Physical Design Inputs Overview | Tutorial | VLSI | Physical Design
00:06:17

PD Lec 7 Physical Design Inputs Overview | Tutorial | VLSI | Physical Design
PD Lec 8 Netlists | PD Inputs part 2 | VLSI | Physical Design
00:04:37

PD Lec 8 Netlists | PD Inputs part 2 | VLSI | Physical Design
PD Lec 9 Timing Library | libs | PD Inputs part 3 | VLSI | Physical Design
00:11:03

PD Lec 9 Timing Library | libs | PD Inputs part 3 | VLSI | Physical Design
PD Lec 10 LEF File | PD Inputs part 4 | VLSI | Physical Design
00:06:22

PD Lec 10 LEF File | PD Inputs part 4 | VLSI | Physical Design
PD Lec 11 Constraints File | PD Inputs part 4 | VLSI | Physical Design
00:13:55

PD Lec 11 Constraints File | PD Inputs part 4 | VLSI | Physical Design
PD Lec 12 Technology File | Tech File | PD Inputs part 5 | VLSI | Physical Design
00:04:07

PD Lec 12 Technology File | Tech File | PD Inputs part 5 | VLSI | Physical Design
PD Lec 13 DEF File | PD Inputs part 6 | VLSI | Physical Design
00:09:29

PD Lec 13 DEF File | PD Inputs part 6 | VLSI | Physical Design
PD Lec 14 Import Design | Milky Way Library | VLSI | Physical Design
00:08:58

PD Lec 14 Import Design | Milky Way Library | VLSI | Physical Design
PD Lec 15 Floor planning part 1 | VLSI | Physical Design
00:07:21

PD Lec 15 Floor planning part 1 | VLSI | Physical Design
PD Lec 16 Floor planning part 2 | VLSI | Physical Design
00:07:01

PD Lec 16 Floor planning part 2 | VLSI | Physical Design
PD Lec 17 Floorplanning IO Placement part 3 | VLSI | Physical Design
00:14:31

PD Lec 17 Floorplanning IO Placement part 3 | VLSI | Physical Design
PD Lec 18 Macro Placement Floor planning part 4 | VLSI | Physical Design
00:14:21

PD Lec 18 Macro Placement Floor planning part 4 | VLSI | Physical Design
PD Lec 19 Macro Placement Guidelines Floor planning part 5 | VLSI | Physical Design
00:07:59

PD Lec 19 Macro Placement Guidelines Floor planning part 5 | VLSI | Physical Design
PD Lec 20 Macro Channel Spacing Estimation Floor planning part 6 | VLSI | Physical Design
00:05:21

PD Lec 20 Macro Channel Spacing Estimation Floor planning part 6 | VLSI | Physical Design
PD Lec 21 Macro Placement Guidelines Floor planning part 7 | VLSI | Physical Design
00:08:48

PD Lec 21 Macro Placement Guidelines Floor planning part 7 | VLSI | Physical Design
PD Lec 22 Blockages and Keep out Margin | Floor planning | VLSI | Physical Design
00:06:32

PD Lec 22 Blockages and Keep out Margin | Floor planning | VLSI | Physical Design
PD Lec 23 Macro placement issues | | Floor planning | VLSI | Physical Design
00:05:52

PD Lec 23 Macro placement issues | | Floor planning | VLSI | Physical Design
PD Lec 24 Power planning and power mesh creation| Floor planning | VLSI | Physical Design
00:07:35

PD Lec 24 Power planning and power mesh creation| Floor planning | VLSI | Physical Design
PD Lec 25 Physical Only Cells | Floor planning | VLSI | Physical Design
00:09:24

PD Lec 25 Physical Only Cells | Floor planning | VLSI | Physical Design
PD Lec 26 Sanity Checks 1 | Floor planning | VLSI | Physical Design
00:04:58

PD Lec 26 Sanity Checks 1 | Floor planning | VLSI | Physical Design
PD Lec 27 Sanity Checks 2 | Floor planning | VLSI | Physical Design
00:07:49

PD Lec 27 Sanity Checks 2 | Floor planning | VLSI | Physical Design
PD Lec 28 Sanity Checks 3 | Floor planning | VLSI | Physical Design
00:05:40

PD Lec 28 Sanity Checks 3 | Floor planning | VLSI | Physical Design
PD Lec 29 Cell Orientation and Flipping | Placement | VLSI | Physical Design
00:08:44

PD Lec 29 Cell Orientation and Flipping | Placement | VLSI | Physical Design
PD Lec 30 Interview Questions | VLSI | Physical Design
00:05:49

PD Lec 30 Interview Questions | VLSI | Physical Design
PD Lec 31 Introduction to Placement | VLSI | Physical Design
00:06:15

PD Lec 31 Introduction to Placement | VLSI | Physical Design
PD Lec 32 Placement of std cells | VLSI | Physical Design
00:05:20

PD Lec 32 Placement of std cells | VLSI | Physical Design
PD Lec 33 Placement and Optimization | VLSI | Physical Design
00:06:23

PD Lec 33 Placement and Optimization | VLSI | Physical Design
PD Lec 34 place opt understanding | VLSI | Physical Design
00:07:34

PD Lec 34 place opt understanding | VLSI | Physical Design
PD Lec 35 Scan Chain Optimization | VLSI | Physical Design
00:09:24

PD Lec 35 Scan Chain Optimization | VLSI | Physical Design
PD Lec 36 Cell Density of std cells | VLSI | Physical Design
00:07:16

PD Lec 36 Cell Density of std cells | VLSI | Physical Design
PD Lec 37 Pin Density of std cells | VLSI | Physical Design
00:05:04

PD Lec 37 Pin Density of std cells | VLSI | Physical Design
PD Lec 38 Global Route Congestion | VLSI | Physical Design
00:05:42

PD Lec 38 Global Route Congestion | VLSI | Physical Design
PD Lec 39 CMOS Latch Up | VLSI | Physical Design
00:09:17

PD Lec 39 CMOS Latch Up | VLSI | Physical Design
PD Lec 40 Well Tap Cell | VLSI | Physical Design
00:04:32

PD Lec 40 Well Tap Cell | VLSI | Physical Design
Show More Lessons


We Appreciate Your Feedback

Excellent
6 Reviews
Good
5 Reviews
medium
1 Reviews
Acceptable
0 Reviews
Not Good
0 Reviews
4.4
12 Reviews
Jangala Vyshnavi

This course is so informative. Just to have some more clarity on some topics and clear notes 2024-12-04

BONAGANI THEJA

nice 2024-11-21

Abhisek V P

it was really good session. 2024-11-10

DHARSHAN S

Good 2024-10-19

Show More Reviews

Our New Certified Courses Will Reach You in Our Telegram Channel
Join Our Telegram Channels to Get Best Free Courses

Join Now

Related Courses

Cabinetry Basics
5 Lessons

Cabinetry Basics

MFT and MFT related accessories
19 Lessons

MFT and MFT related accessories

hinges workshops
4 Lessons

hinges workshops

CNC Computer numerical control
11 Lessons

CNC Computer numerical control

Jointing Systems
9 Lessons

Jointing Systems

Cabinet tips
9 Lessons

Cabinet tips

Festool Domino
7 Lessons

Festool Domino

Bandsaws
9 Lessons

Bandsaws

doors building
6 Lessons

doors building

Communication Circuits Experiments
1 Lessons

Communication Circuits Experiments

Experiments with PlutoSDR
2 Lessons

Experiments with PlutoSDR

Electric Motors
6 Lessons

Electric Motors

Energy Engineering
7 Lessons

Energy Engineering

Digital Electronics
52 Lessons

Digital Electronics

Engineering Hydrology
74 Lessons

Engineering Hydrology

Engineering Mechanics
73 Lessons

Engineering Mechanics

VLSI Physical Design course in hindi, in this course explores the intricacies of chip layout, placement, and routing for efficient and high-performance integrated circuit design